Freescale Semiconductor /MKW21Z4 /DCDC /REG6

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Interpret as REG6

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PSWITCH_INT_RISE_EN)PSWITCH_INT_RISE_EN 0 (PSWITCH_INT_FALL_EN)PSWITCH_INT_FALL_EN 0 (PSWITCH_INT_CLEAR)PSWITCH_INT_CLEAR 0 (PSWITCH_INT_MUTE)PSWITCH_INT_MUTE 0 (PSWITCH_INT_STS)PSWITCH_INT_STS

Description

DCDC REGISTER 6

Fields

PSWITCH_INT_RISE_EN

Enable rising edge detect for interrupt.

PSWITCH_INT_FALL_EN

Enable falling edge detect for interrupt.

PSWITCH_INT_CLEAR

Write 1 to clear interrupt. Set to 0 after clear.

PSWITCH_INT_MUTE

Mask interrupt to SoC, edge detection result can be read from PSIWTCH_INT_STS.

PSWITCH_INT_STS

PSWITCH edge detection interrupt status

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